d7eefce583
Removed capital letters from filenames
2019-04-20 16:53:06 +02:00
296e77eebc
C API - first working version
2019-04-20 11:08:01 +02:00
8c37d4aac3
More refactoring
2019-04-12 19:36:08 +02:00
b4c02051fa
Reworked SuperscalarHash instruction set
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ASM and C code generator for SuperscalarHash
Support for Superscalar hash in the light mode
2019-04-07 15:38:51 +02:00
77dbe14658
SuperscalarHash JIT compiler
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(unfinished)
2019-04-06 12:00:56 +02:00
2b9209346e
Operand allocation
2019-04-01 00:38:17 +02:00
59bbb572c2
WIP
2019-03-28 15:27:10 +01:00
174754cb2b
Added branches - ASM and JIT only
2019-03-17 23:09:11 +01:00
f3b114af88
Replaced division instructions with IMUL_RCP
2019-02-22 17:48:26 +01:00
923420f0a3
Fixed mining and verification mode not giving the same results
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Trace support in Assembly generator
2019-02-16 23:18:45 +01:00
f76e8c2e20
Reworked "FNEG" instruction to make ASIC optimizations more difficult
2019-02-13 00:01:34 +01:00
32d827d0a6
Interpreter with bytecode
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Fixed some undefined behavior with signed types
Fixed different results on big endian systems
Removed unused code files
Restored FNEG_R instructions
Updated documentation
2019-02-09 15:45:26 +01:00
a586751f6b
Removed FPNEG instruction
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Optimized instruction frequencies
Increased the range for A registers from [1,65536) to [1, 4294967296)
2019-02-07 16:11:27 +01:00
ac4462ad42
Renamed floating point instructions
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Fixed negative source operand for FMUL_M and FDIV_M
2019-02-05 23:43:57 +01:00
1ee94bef2a
Added ISWAP instruction
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Scratchpad -> 2 MiB
New scratchpad initialization
New dataset initialization
2019-02-04 17:07:00 +01:00
8f2abd6c05
NOP instruction
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register load/store from L3
2019-01-27 18:19:49 +01:00
005c67f64c
Added explicit STORE instructions
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JIT compiler
2019-01-27 10:52:30 +01:00
d2cb086221
ASM code generator for "small" programs that fit into the uOP cache
2019-01-24 19:29:59 +01:00
2756bcdcfe
Added magic division to JIT compiler
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New B operand selection rules
2019-01-11 16:53:52 +01:00
557241cd95
JUMP instruction
2019-01-11 09:58:06 +01:00
d1a808643d
Random accesses - JIT compiler
2019-01-10 22:04:55 +01:00
b71e0eec65
Optimizations to reduce code size under 32K
2019-01-08 14:50:31 +01:00
2f6a599ff6
Inlined calls for memory read
2019-01-07 17:44:43 +01:00
619bee5418
Random dataset accesses - asm only
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Initial support for large pages
2019-01-04 19:44:15 +01:00
3caecc7646
Vector FPU instructions
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JitCompilerX86 - static code written in asm
Updated ALU/FPU tests
Updated instruction weights
2018-12-31 19:06:45 +01:00
cb0721056a
Assembly code generator for Windows 64-bit
2018-12-13 23:11:55 +01:00
tevador