6e8c83fdb6
Fixed softAes compilation on PowerPC
2019-02-25 13:17:26 +01:00
7c012b4fee
Fixed non-portable nonce serialization
...
updated program.inc
2019-02-25 09:31:35 +01:00
d9bc6cfeda
Updated JIT compiler and assembly generator for new int -> float conversion
2019-02-24 17:24:06 +01:00
790b382eda
Reworked conversion int -> float for register group E
2019-02-24 14:48:07 +01:00
f3b114af88
Replaced division instructions with IMUL_RCP
2019-02-22 17:48:26 +01:00
9d5f621d5c
Removed divideByConstantCodegen
2019-02-22 13:47:47 +01:00
18ca8b5020
Merge branch 'master' of git@github.com:tevador/RandomX.git
2019-02-20 12:57:48 +01:00
d9fcb34138
Fixed big endian load/store
2019-02-20 12:56:34 +01:00
88cf9d0728
Fixed 32-bit Windows build
2019-02-19 23:12:56 +01:00
219efce06c
New command line options
2019-02-19 22:47:45 +01:00
81c5917def
Improved makefile header dependencies
2019-02-19 22:47:05 +01:00
67c2674322
Added GPU hashrate estimate
2019-02-18 23:14:33 +01:00
d3bc261617
Merge branch 'dev'
2019-02-18 22:10:03 +01:00
f930d5d4dc
Fixed a bug in FSWAP_R
2019-02-18 22:09:20 +01:00
c5309fae9e
Fixed portable intrinsics compilation
2019-02-18 17:57:54 +01:00
a6c6026e2b
Fixed possible memory alignment issue
2019-02-18 08:59:51 +01:00
bf34d27ecd
Portable SSE2 intrinsics
2019-02-18 08:56:37 +01:00
954365634e
Fixed alignment of VirtualMachine
2019-02-18 08:54:55 +01:00
dce8c74fa8
Fixed software AES in getResult
2019-02-18 08:45:39 +01:00
9a23bdb40d
Fixed linux version of SquareHash
2019-02-18 08:44:28 +01:00
bfd557dac5
Added reference result
...
Fixed undefined initial rounding mode
2019-02-17 10:54:51 +01:00
923420f0a3
Fixed mining and verification mode not giving the same results
...
Trace support in Assembly generator
2019-02-16 23:18:45 +01:00
a145caa185
Fixed JIT compiler not producing the same code as genAsm and genNative
2019-02-15 16:43:52 +01:00
f0d52fcf4d
Fixed dependent constants
2019-02-15 11:38:20 +01:00
ff0c5a58b3
More compact bytecode
2019-02-15 11:14:40 +01:00
447e8a1d4f
Simplified division in interpreted mode
...
Fixed incorrect condition code in JitCompilerX86
Refactoring
2019-02-15 10:41:02 +01:00
1df975e583
Restored software AES support
2019-02-13 22:46:32 +01:00
f76e8c2e20
Reworked "FNEG" instruction to make ASIC optimizations more difficult
2019-02-13 00:01:34 +01:00
376c868ca0
Fixed wrong REX prefix in FDIV_M code
2019-02-12 23:20:10 +01:00
5a89c9b28e
Use allocExecutableMemory
2019-02-12 18:18:02 +01:00
0b1761a846
Refactoring: mining/verification mode
2019-02-11 18:57:42 +01:00
69764966c0
Position independent loads fixed #21
2019-02-11 18:13:03 +01:00
49581e503a
Merge pull request #20 from antanst/fix-uname
...
Use portable uname flag, handle OpenBSD case of amd64
2019-02-11 16:00:17 +01:00
dd2c894d69
Use portable uname flag, handle OpenBSD case of amd64
2019-02-11 16:51:34 +02:00
e54697b952
Correct hashrate of i7-8550U with large pages
2019-02-10 00:20:21 +01:00
98c4ccf5ca
Merge branch 'dev'
2019-02-09 20:02:14 +01:00
85b31342e1
Removed old documentation
2019-02-09 20:02:08 +01:00
b8ce504be6
Added comments to hashAes1Rx4 and fillAes1Rx4
...
Fixed gcc compilation
Added performance numbers
2019-02-09 19:32:53 +01:00
2798d78717
Render imm32 as signed in RandomX code
2019-02-09 16:19:15 +01:00
9af0cbf108
Documentation formatting
2019-02-09 16:09:55 +01:00
32d827d0a6
Interpreter with bytecode
...
Fixed some undefined behavior with signed types
Fixed different results on big endian systems
Removed unused code files
Restored FNEG_R instructions
Updated documentation
2019-02-09 15:45:26 +01:00
a586751f6b
Removed FPNEG instruction
...
Optimized instruction frequencies
Increased the range for A registers from [1,65536) to [1, 4294967296)
2019-02-07 16:11:27 +01:00
ac4462ad42
Renamed floating point instructions
...
Fixed negative source operand for FMUL_M and FDIV_M
2019-02-05 23:43:57 +01:00
b417fd08ea
16 -> 8 chained programs
...
constant address loads are always from L3
2019-02-05 23:06:44 +01:00
1ee94bef2a
Added ISWAP instruction
...
Scratchpad -> 2 MiB
New scratchpad initialization
New dataset initialization
2019-02-04 17:07:00 +01:00
ab859879a2
loop body = 128 instructions
2019-01-27 20:10:03 +01:00
20eb549725
Merged load/store of integer and FP registers
2019-01-27 19:33:55 +01:00
8f2abd6c05
NOP instruction
...
register load/store from L3
2019-01-27 18:19:49 +01:00
005c67f64c
Added explicit STORE instructions
...
JIT compiler
2019-01-27 10:52:30 +01:00
7c049cce8d
Added store instructions
2019-01-24 21:49:39 +01:00
tevador
tevador
Antonis Anastasiadis