tevador
923420f0a3
Fixed mining and verification mode not giving the same results
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Trace support in Assembly generator
2019-02-16 23:18:45 +01:00
tevador
a145caa185
Fixed JIT compiler not producing the same code as genAsm and genNative
2019-02-15 16:43:52 +01:00
tevador
447e8a1d4f
Simplified division in interpreted mode
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Fixed incorrect condition code in JitCompilerX86
Refactoring
2019-02-15 10:41:02 +01:00
tevador
1df975e583
Restored software AES support
2019-02-13 22:46:32 +01:00
tevador
0b1761a846
Refactoring: mining/verification mode
2019-02-11 18:57:42 +01:00
tevador
b8ce504be6
Added comments to hashAes1Rx4 and fillAes1Rx4
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Fixed gcc compilation
Added performance numbers
2019-02-09 19:32:53 +01:00
tevador
2798d78717
Render imm32 as signed in RandomX code
2019-02-09 16:19:15 +01:00
tevador
32d827d0a6
Interpreter with bytecode
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Fixed some undefined behavior with signed types
Fixed different results on big endian systems
Removed unused code files
Restored FNEG_R instructions
Updated documentation
2019-02-09 15:45:26 +01:00
tevador
b417fd08ea
16 -> 8 chained programs
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constant address loads are always from L3
2019-02-05 23:06:44 +01:00
tevador
1ee94bef2a
Added ISWAP instruction
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Scratchpad -> 2 MiB
New scratchpad initialization
New dataset initialization
2019-02-04 17:07:00 +01:00
tevador
8f2abd6c05
NOP instruction
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register load/store from L3
2019-01-27 18:19:49 +01:00
tevador
005c67f64c
Added explicit STORE instructions
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JIT compiler
2019-01-27 10:52:30 +01:00
tevador
d2cb086221
ASM code generator for "small" programs that fit into the uOP cache
2019-01-24 19:29:59 +01:00
tevador
bd0dba88a8
4 scratchpad segments
2019-01-20 00:44:01 +01:00
tevador
16db607025
Scratchpad size increased to 1 MiB
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New AES-based scratchpad hashing function
2019-01-18 23:51:18 +01:00
tevador
93c324709b
Related to previous changes
2019-01-18 19:06:46 +01:00
tevador
4fb168e249
Large page support for cache
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Bug fixes
2019-01-18 17:57:47 +01:00
tevador
8b1102ee05
Interpreter + async mode
2019-01-15 00:01:11 +01:00
tevador
1426fcbab5
Print average program code size
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Fixed assembly for MUL_64 and IMUL_32
Division weight 4 -> 8
2019-01-12 16:05:09 +01:00
tevador
d1a808643d
Random accesses - JIT compiler
2019-01-10 22:04:55 +01:00
tevador
619bee5418
Random dataset accesses - asm only
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Initial support for large pages
2019-01-04 19:44:15 +01:00
tevador
3caecc7646
Vector FPU instructions
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JitCompilerX86 - static code written in asm
Updated ALU/FPU tests
Updated instruction weights
2018-12-31 19:06:45 +01:00
tevador
5bc26348f1
Updated readme with performance data
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Added --help option
2018-12-23 18:02:17 +01:00
tevador
03913d0e81
Run a single thread synchronously
2018-12-23 15:12:54 +01:00
tevador
740c40b218
8 branch conditions for CALL/RET
2018-12-21 22:41:35 +01:00
tevador
55afe9646f
Debuggable assembly generator
2018-12-21 21:09:55 +01:00
tevador
b9d2d853aa
Support for multiple threads
2018-12-19 21:54:44 +01:00
tevador
cb12feaf91
t1ha2 hash for scratchpad digest
2018-12-19 12:38:10 +01:00
tevador
ed0bc906d6
JIT compiler for x86
2018-12-18 22:00:58 +01:00
tevador
cb0721056a
Assembly code generator for Windows 64-bit
2018-12-13 23:11:55 +01:00
tevador
c9102ee88c
RandomX portable interpreter
2018-12-11 21:00:30 +01:00