Commit graph

101 commits

Author SHA1 Message Date
tevador
233af9f14f Minor fixes for non-x86 platforms 2019-03-22 12:03:39 +01:00
tevador
4c1ae951de Merge branch 'feature/branches' into dev
Conflicts:
	src/JitCompilerX86.cpp
	src/JitCompilerX86.hpp
	src/main.cpp
2019-03-22 11:53:48 +01:00
tevador
28ed776fbe Light JIT compiler - Linux 2019-03-22 11:00:21 +01:00
tevador
73a11f5c01 CompiledLightVirtualMachine 2019-03-21 20:44:59 +01:00
tevador
00368cae02 Fixed stats compilation 2019-03-21 09:17:28 +01:00
tevador
007f8599b9 Implemented branches in the interpreter
Fixed x86 immediate encoding
2019-03-20 23:38:37 +01:00
tevador
1617d8e34e Fixed squareHash reference 2019-03-20 00:36:12 +01:00
tevador
1945aae9f8 align -> balign 2019-03-19 22:27:17 +01:00
tevador
174754cb2b Added branches - ASM and JIT only 2019-03-17 23:09:11 +01:00
tevador
6b344b81fd initBlock asm version (disabled) 2019-03-17 00:57:48 +01:00
tevador
91063aac91 Reference result 2019-03-16 20:59:42 +01:00
tevador
344f365c42 Updated constants according to the specs 2019-03-16 00:10:09 +01:00
tevador
edde7672e0 initBlock: cycle columns, asm implementation 2019-03-15 18:00:51 +01:00
tevador
a1dc094c19 added epoch lag configuration 2019-03-11 23:43:52 +01:00
tevador
958d2bdc15 Fixed non-portable deserialization 2019-03-11 23:04:34 +01:00
tevador
2edf05cedc Implemented Dataset size increase per epoch 2019-03-10 23:14:03 +01:00
tevador
e65d9da66c Configurable parameters separated into configuration.h 2019-03-08 15:34:34 +01:00
tevador
096a7c0d7b Implemented virtual memory free
Removed legacy AES code
2019-03-08 11:46:03 +01:00
tevador
6e8c83fdb6 Fixed softAes compilation on PowerPC 2019-02-25 13:17:26 +01:00
tevador
7c012b4fee Fixed non-portable nonce serialization
updated program.inc
2019-02-25 09:31:35 +01:00
tevador
d9bc6cfeda Updated JIT compiler and assembly generator for new int -> float conversion 2019-02-24 17:24:06 +01:00
tevador
790b382eda Reworked conversion int -> float for register group E 2019-02-24 14:48:07 +01:00
tevador
f3b114af88 Replaced division instructions with IMUL_RCP 2019-02-22 17:48:26 +01:00
tevador
9d5f621d5c Removed divideByConstantCodegen 2019-02-22 13:47:47 +01:00
tevador
d9fcb34138 Fixed big endian load/store 2019-02-20 12:56:34 +01:00
tevador
88cf9d0728 Fixed 32-bit Windows build 2019-02-19 23:12:56 +01:00
tevador
219efce06c New command line options 2019-02-19 22:47:45 +01:00
tevador
f930d5d4dc Fixed a bug in FSWAP_R 2019-02-18 22:09:20 +01:00
tevador
c5309fae9e Fixed portable intrinsics compilation 2019-02-18 17:57:54 +01:00
tevador
bf34d27ecd Portable SSE2 intrinsics 2019-02-18 08:56:37 +01:00
tevador
954365634e Fixed alignment of VirtualMachine 2019-02-18 08:54:55 +01:00
tevador
dce8c74fa8 Fixed software AES in getResult 2019-02-18 08:45:39 +01:00
tevador
9a23bdb40d Fixed linux version of SquareHash 2019-02-18 08:44:28 +01:00
tevador
bfd557dac5 Added reference result
Fixed undefined initial rounding mode
2019-02-17 10:54:51 +01:00
tevador
923420f0a3 Fixed mining and verification mode not giving the same results
Trace support in Assembly generator
2019-02-16 23:18:45 +01:00
tevador
a145caa185 Fixed JIT compiler not producing the same code as genAsm and genNative 2019-02-15 16:43:52 +01:00
tevador
f0d52fcf4d Fixed dependent constants 2019-02-15 11:38:20 +01:00
tevador
ff0c5a58b3 More compact bytecode 2019-02-15 11:14:40 +01:00
tevador
447e8a1d4f Simplified division in interpreted mode
Fixed incorrect condition code in JitCompilerX86
Refactoring
2019-02-15 10:41:02 +01:00
tevador
1df975e583 Restored software AES support 2019-02-13 22:46:32 +01:00
tevador
f76e8c2e20 Reworked "FNEG" instruction to make ASIC optimizations more difficult 2019-02-13 00:01:34 +01:00
tevador
376c868ca0 Fixed wrong REX prefix in FDIV_M code 2019-02-12 23:20:10 +01:00
tevador
5a89c9b28e Use allocExecutableMemory 2019-02-12 18:18:02 +01:00
tevador
0b1761a846 Refactoring: mining/verification mode 2019-02-11 18:57:42 +01:00
tevador
69764966c0 Position independent loads fixed #21 2019-02-11 18:13:03 +01:00
tevador
b8ce504be6 Added comments to hashAes1Rx4 and fillAes1Rx4
Fixed gcc compilation
Added performance numbers
2019-02-09 19:32:53 +01:00
tevador
2798d78717 Render imm32 as signed in RandomX code 2019-02-09 16:19:15 +01:00
tevador
32d827d0a6 Interpreter with bytecode
Fixed some undefined behavior with signed types
Fixed different results on big endian systems
Removed unused code files
Restored FNEG_R instructions
Updated documentation
2019-02-09 15:45:26 +01:00
tevador
a586751f6b Removed FPNEG instruction
Optimized instruction frequencies
Increased the range for A registers from [1,65536) to [1, 4294967296)
2019-02-07 16:11:27 +01:00
tevador
ac4462ad42 Renamed floating point instructions
Fixed negative source operand for FMUL_M and FDIV_M
2019-02-05 23:43:57 +01:00