tevador
|
d7eefce583
|
Removed capital letters from filenames
|
2019-04-20 16:53:06 +02:00 |
|
tevador
|
b4c02051fa
|
Reworked SuperscalarHash instruction set
ASM and C code generator for SuperscalarHash
Support for Superscalar hash in the light mode
|
2019-04-07 15:38:51 +02:00 |
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tevador
|
77dbe14658
|
SuperscalarHash JIT compiler
(unfinished)
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2019-04-06 12:00:56 +02:00 |
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tevador
|
73a11f5c01
|
CompiledLightVirtualMachine
|
2019-03-21 20:44:59 +01:00 |
|
tevador
|
20eb549725
|
Merged load/store of integer and FP registers
|
2019-01-27 19:33:55 +01:00 |
|
tevador
|
005c67f64c
|
Added explicit STORE instructions
JIT compiler
|
2019-01-27 10:52:30 +01:00 |
|
tevador
|
a7ffe8c19a
|
Mix dataset cacheline with registers r0-r7
|
2019-01-13 21:14:59 +01:00 |
|
tevador
|
d1a808643d
|
Random accesses - JIT compiler
|
2019-01-10 22:04:55 +01:00 |
|
tevador
|
3caecc7646
|
Vector FPU instructions
JitCompilerX86 - static code written in asm
Updated ALU/FPU tests
Updated instruction weights
|
2018-12-31 19:06:45 +01:00 |