19 commits

Author	SHA1	Message	Date
tevador	8a5ead5ce3	Use 'dst' as the CBRANCH condition register ... See issue #43	2019-05-21 08:37:36 +02:00
tevador	2706a8b753	Relicensed under the 3-clause BSD license	2019-05-18 14:21:47 +02:00
tevador	2b3a03a9dc	Fixed FSCAL instruction causing group F registers to exceed their intended maximum value	2019-05-15 22:07:26 +02:00
tevador	afaeff6066	Fixed incorrect sqrt results on 32bit targets using x87 math ... Cleaner implementation of FSWAP	2019-05-15 13:23:50 +02:00
tevador	1aa7865619	Abstracted away from x86 intrinsics	2019-05-14 09:13:38 +02:00
tevador	b1f1e1d6ad	Fixed IMUL_RCP if divisor is a power of 2	2019-05-04 18:00:17 +02:00
tevador	9e5eac8645	Fixed a chance of CBRANCH looping ... Fixed CBRANCH jump probability being lower than expected	2019-05-03 14:02:40 +02:00
tevador	c87dcc8ae5	Cache seed renamed to key	2019-05-01 14:40:13 +02:00
tevador	ca96270509	Group E exponent changed from a static value (-240) to dynamic	2019-04-30 21:14:50 +02:00
tevador	3cf6a30076	Fixed biased condition register selection	2019-04-30 10:20:28 +02:00
tevador	ffebc37381	COND_R instruction reworked as CBRANCH ... instruction mod field bits reallocated	2019-04-29 23:38:23 +02:00
tevador	7f6bdd9a52	Code cleanup & refactoring	2019-04-28 16:42:45 +02:00
tevador	22a3aa8d79	randomx_cache and randomx_dataset changed to standard-layout structs	2019-04-28 12:44:28 +02:00
tevador	fd7186f873	Changed IADD_RS to use mod.mem	2019-04-27 23:52:26 +02:00
tevador	270a4f97fe	Dataset size increased to 2080 MiB ... Implemented dataset base offset Tweaked SuperscalarHash constants to prevent register collisions	2019-04-26 16:05:30 +02:00
tevador	f66da3911e	Fixed some compilation issues ... Code cleanup	2019-04-26 11:07:47 +02:00
tevador	018c1a5222	Big endian bug fixes	2019-04-24 18:37:58 +02:00
tevador	4c66b2305a	Formatting & refactoring	2019-04-22 18:20:46 +02:00
tevador	d7eefce583	Removed capital letters from filenames	2019-04-20 16:53:06 +02:00

Renamed from src/InterpretedVirtualMachine.cpp (Browse further)