32d827d0a6
Interpreter with bytecode
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Fixed some undefined behavior with signed types
Fixed different results on big endian systems
Removed unused code files
Restored FNEG_R instructions
Updated documentation
2019-02-09 15:45:26 +01:00
a586751f6b
Removed FPNEG instruction
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Optimized instruction frequencies
Increased the range for A registers from [1,65536) to [1, 4294967296)
2019-02-07 16:11:27 +01:00
ac4462ad42
Renamed floating point instructions
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Fixed negative source operand for FMUL_M and FDIV_M
2019-02-05 23:43:57 +01:00
b417fd08ea
16 -> 8 chained programs
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constant address loads are always from L3
2019-02-05 23:06:44 +01:00
1ee94bef2a
Added ISWAP instruction
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Scratchpad -> 2 MiB
New scratchpad initialization
New dataset initialization
2019-02-04 17:07:00 +01:00
20eb549725
Merged load/store of integer and FP registers
2019-01-27 19:33:55 +01:00
8f2abd6c05
NOP instruction
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register load/store from L3
2019-01-27 18:19:49 +01:00
005c67f64c
Added explicit STORE instructions
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JIT compiler
2019-01-27 10:52:30 +01:00
d2cb086221
ASM code generator for "small" programs that fit into the uOP cache
2019-01-24 19:29:59 +01:00
bd0dba88a8
4 scratchpad segments
2019-01-20 00:44:01 +01:00
16db607025
Scratchpad size increased to 1 MiB
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New AES-based scratchpad hashing function
2019-01-18 23:51:18 +01:00
4fb168e249
Large page support for cache
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Bug fixes
2019-01-18 17:57:47 +01:00
8b1102ee05
Interpreter + async mode
2019-01-15 00:01:11 +01:00
a7ffe8c19a
Mix dataset cacheline with registers r0-r7
2019-01-13 21:14:59 +01:00
48d85643de
Dataset intialization algorithm (AES)
2019-01-13 13:47:25 +01:00
67e741ff22
Reduced x86 code size by 512 bytes (and ecx -> and eax)
2019-01-12 20:27:35 +01:00
1426fcbab5
Print average program code size
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Fixed assembly for MUL_64 and IMUL_32
Division weight 4 -> 8
2019-01-12 16:05:09 +01:00
2756bcdcfe
Added magic division to JIT compiler
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New B operand selection rules
2019-01-11 16:53:52 +01:00
c02ee4291d
FPROUND - variable flag offset
2019-01-11 10:52:12 +01:00
e487092f07
Simplified CALL and RET
2019-01-11 10:18:24 +01:00
557241cd95
JUMP instruction
2019-01-11 09:58:06 +01:00
d1a808643d
Random accesses - JIT compiler
2019-01-10 22:04:55 +01:00
3caecc7646
Vector FPU instructions
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JitCompilerX86 - static code written in asm
Updated ALU/FPU tests
Updated instruction weights
2018-12-31 19:06:45 +01:00
a09bee8d60
js -> jz to enable macro-op fusion on Intel CPUs (~1% speed-up)
2018-12-28 14:18:41 +01:00
76b6b05cf2
Unconditional RET
2018-12-28 12:09:37 +01:00
39c569ae44
Fixed a potential crash in JitCompilerX86
2018-12-27 21:42:38 +01:00
c05947db09
Bug fixes
2018-12-23 14:25:22 +01:00
ca59925495
JitCompilerX86: use mmap to allocate an executable buffer
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compile as c++11
2018-12-23 14:09:09 +01:00
740c40b218
8 branch conditions for CALL/RET
2018-12-21 22:41:35 +01:00
1db7dd6e8b
Renamed immediate constants
2018-12-20 18:36:09 +01:00
ed0bc906d6
JIT compiler for x86
2018-12-18 22:00:58 +01:00
tevador