15 commits

Author	SHA1	Message	Date
tevador	2798d78717	Render imm32 as signed in RandomX code	2019-02-09 16:19:15 +01:00
tevador	32d827d0a6	Interpreter with bytecode ... Fixed some undefined behavior with signed types Fixed different results on big endian systems Removed unused code files Restored FNEG_R instructions Updated documentation	2019-02-09 15:45:26 +01:00
tevador	1ee94bef2a	Added ISWAP instruction ... Scratchpad -> 2 MiB New scratchpad initialization New dataset initialization	2019-02-04 17:07:00 +01:00
tevador	d2cb086221	ASM code generator for "small" programs that fit into the uOP cache	2019-01-24 19:29:59 +01:00
tevador	bd0dba88a8	4 scratchpad segments	2019-01-20 00:44:01 +01:00
tevador	8b1102ee05	Interpreter + async mode	2019-01-15 00:01:11 +01:00
tevador	d1a808643d	Random accesses - JIT compiler	2019-01-10 22:04:55 +01:00
tevador	3caecc7646	Vector FPU instructions ... JitCompilerX86 - static code written in asm Updated ALU/FPU tests Updated instruction weights	2018-12-31 19:06:45 +01:00
tevador	76b6b05cf2	Unconditional RET	2018-12-28 12:09:37 +01:00
tevador	740c40b218	8 branch conditions for CALL/RET	2018-12-21 22:41:35 +01:00
tevador	ffa67295c4	Instruction statistics	2018-12-20 22:42:47 +01:00
tevador	1db7dd6e8b	Renamed immediate constants	2018-12-20 18:36:09 +01:00
tevador	6332831ec1	Implemented cache shift ... Fixed assembly code generator Fixed an error in the interpreter Updated specification: sign-extended immediates	2018-12-15 23:13:17 +01:00
tevador	cb0721056a	Assembly code generator for Windows 64-bit	2018-12-13 23:11:55 +01:00
tevador	c9102ee88c	RandomX portable interpreter	2018-12-11 21:00:30 +01:00