73a11f5c01
CompiledLightVirtualMachine
2019-03-21 20:44:59 +01:00
d9bc6cfeda
Updated JIT compiler and assembly generator for new int -> float conversion
2019-02-24 17:24:06 +01:00
32d827d0a6
Interpreter with bytecode
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Fixed some undefined behavior with signed types
Fixed different results on big endian systems
Removed unused code files
Restored FNEG_R instructions
Updated documentation
2019-02-09 15:45:26 +01:00
a586751f6b
Removed FPNEG instruction
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Optimized instruction frequencies
Increased the range for A registers from [1,65536) to [1, 4294967296)
2019-02-07 16:11:27 +01:00
20eb549725
Merged load/store of integer and FP registers
2019-01-27 19:33:55 +01:00
tevador