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https://git.wownero.com/wownero/RandomWOW.git
synced 2024-08-15 00:23:14 +00:00
Fixed cache alignment
Performance tuning
This commit is contained in:
tevador
parent
77dbe14658
commit
6e3136b37f
6 changed files with 43 additions and 30 deletions
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@ -34,7 +34,7 @@ namespace RandomX {
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return (uint8_t*)allocLargePagesMemory(size);
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}
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else {
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void* ptr = _mm_malloc(size, sizeof(__m128i));
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void* ptr = _mm_malloc(size, CacheLineSize);
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if (ptr == nullptr)
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throw std::bad_alloc();
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return (uint8_t*)ptr;
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@ -628,7 +628,7 @@ namespace RandomX {
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emitByte(0xc8 + instr.dst);
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}
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else {
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if (NOP_TEST) {
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if (false && NOP_TEST) {
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emit(NOP4);
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return;
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}
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@ -216,7 +216,7 @@ namespace RandomX {
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const MacroOp MacroOp::Sub_ri = MacroOp("sub r,i", 7, 1, ExecutionPort::P015);
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const MacroOp MacroOp::Imul_rr = MacroOp("imul r,r", 4, 3, ExecutionPort::P1);
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const MacroOp MacroOp::Imul_rri = MacroOp("imul r,r,i", 7, 3, ExecutionPort::P1);
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const MacroOp MacroOp::Imul_r = MacroOp("imul r", 3, 3, ExecutionPort::P1, ExecutionPort::P5);
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const MacroOp MacroOp::Imul_r = MacroOp("imul r", 3, 4, ExecutionPort::P1, ExecutionPort::P5);
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const MacroOp MacroOp::Mul_r = MacroOp("mul r", 3, 3, ExecutionPort::P1, ExecutionPort::P5);
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const MacroOp MacroOp::Mov_rr = MacroOp("mov r,r", 3);
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const MacroOp MacroOp::Mov_ri64 = MacroOp("mov rax,i64", 10, 1, ExecutionPort::P015);
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@ -357,9 +357,11 @@ namespace RandomX {
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const char* getName() const {
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return name_;
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}
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const DecoderBuffer* fetchNext(int prevType, Blake2Generator& gen) const {
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if (prevType == LightInstructionType::IMULH_R || prevType == LightInstructionType::ISMULH_R)
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const DecoderBuffer* fetchNext(int instrType, int cycle, int mulCount, Blake2Generator& gen) const {
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if (instrType == LightInstructionType::IMULH_R || instrType == LightInstructionType::ISMULH_R)
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return &decodeBuffer3310; //2-1-1 decode
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if (mulCount < cycle)
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return &decodeBuffer4444_mul;
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if (index_ == 0) {
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return &decodeBuffer4444; //IMUL_RCP end
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}
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@ -381,15 +383,16 @@ namespace RandomX {
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static const DecoderBuffer decodeBuffer7333;
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static const DecoderBuffer decodeBuffer3337;
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static const DecoderBuffer decodeBuffer4444;
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static const DecoderBuffer decodeBuffer4444_mul;
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static const DecoderBuffer decodeBuffer3733;
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static const DecoderBuffer decodeBuffer3373;
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static const DecoderBuffer decodeBuffer133;
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static const DecoderBuffer* decodeBuffers[7];
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const DecoderBuffer* fetchNextDefault(Blake2Generator& gen) const {
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int select;
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do {
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select = gen.getByte() & 7;
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} while (select == 7);
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//do {
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select = gen.getByte() & 3;
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//} while (select == 7);
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return decodeBuffers[select];
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}
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};
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@ -397,17 +400,16 @@ namespace RandomX {
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const DecoderBuffer DecoderBuffer::decodeBuffer3310 = DecoderBuffer("3,3,10", 0, buffer0);
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const DecoderBuffer DecoderBuffer::decodeBuffer7333 = DecoderBuffer("7,3,3,3", 1, buffer1);
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const DecoderBuffer DecoderBuffer::decodeBuffer3337 = DecoderBuffer("3,3,3,7", 2, buffer2);
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const DecoderBuffer DecoderBuffer::decodeBuffer4444_mul = DecoderBuffer("4,4,4,4-MUL", 3, buffer4);
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const DecoderBuffer DecoderBuffer::decodeBuffer4444 = DecoderBuffer("4,4,4,4", 4, buffer4);
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const DecoderBuffer DecoderBuffer::decodeBuffer3733 = DecoderBuffer("3,7,3,3", 5, buffer5);
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const DecoderBuffer DecoderBuffer::decodeBuffer3373 = DecoderBuffer("3,3,7,3", 6, buffer6);
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const DecoderBuffer DecoderBuffer::decodeBuffer133 = DecoderBuffer("13,3", 7, buffer7);
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const DecoderBuffer* DecoderBuffer::decodeBuffers[7] = {
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&DecoderBuffer::decodeBuffer3310,
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&DecoderBuffer::decodeBuffer7333,
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&DecoderBuffer::decodeBuffer3337,
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&DecoderBuffer::decodeBuffer4444,
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&DecoderBuffer::decodeBuffer4444,
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&DecoderBuffer::decodeBuffer3733,
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&DecoderBuffer::decodeBuffer3373,
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};
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@ -417,8 +419,8 @@ namespace RandomX {
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const LightInstructionInfo* slot_3[] = { &LightInstructionInfo::ISUB_R, &LightInstructionInfo::IXOR_R };
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const LightInstructionInfo* slot_3L[] = { &LightInstructionInfo::ISUB_R, &LightInstructionInfo::IXOR_R, &LightInstructionInfo::IMULH_R, &LightInstructionInfo::ISMULH_R };
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const LightInstructionInfo* slot_3C[] = { &LightInstructionInfo::ISUB_R, &LightInstructionInfo::IXOR_R, &LightInstructionInfo::IROR_R, &LightInstructionInfo::IXOR_R };
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const LightInstructionInfo* slot_4[] = { &LightInstructionInfo::IMUL_R, &LightInstructionInfo::IROR_C, &LightInstructionInfo::IADD_RS, &LightInstructionInfo::IMUL_R };
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const LightInstructionInfo* slot_7[] = { &LightInstructionInfo::ISUB_C, &LightInstructionInfo::IMUL_C, &LightInstructionInfo::IXOR_C, &LightInstructionInfo::ISUB_C };
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const LightInstructionInfo* slot_4[] = { &LightInstructionInfo::IROR_C, &LightInstructionInfo::IADD_RS };
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const LightInstructionInfo* slot_7[] = { &LightInstructionInfo::IXOR_C, &LightInstructionInfo::ISUB_C };
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const LightInstructionInfo* slot_7L = &LightInstructionInfo::COND_R;
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const LightInstructionInfo* slot_10 = &LightInstructionInfo::IMUL_RCP;
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@ -448,27 +450,34 @@ namespace RandomX {
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instr.setImm32(imm32_);
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}
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static LightInstruction createForSlot(Blake2Generator& gen, int slotSize, bool isLast = false, bool complex = false) {
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static LightInstruction createForSlot(Blake2Generator& gen, int slotSize, int fetchType, bool isLast, bool isFirst) {
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switch (slotSize)
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{
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case 3:
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if (isLast) {
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return create(slot_3L[gen.getByte() & 3], gen);
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}
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else if (complex) {
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else if (false && isFirst && fetchType == 0) {
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return create(slot_3C[gen.getByte() & 3], gen);
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}
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else {
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return create(slot_3[gen.getByte() & 1], gen);
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}
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case 4:
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return create(slot_4[gen.getByte() & 3], gen);
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if (fetchType == 3 && !isLast) {
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return create(&LightInstructionInfo::IMUL_R, gen);
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}
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else {
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return create(slot_4[gen.getByte() & 1], gen);
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}
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case 7:
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if (false && isLast) {
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return create(slot_7L, gen);
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}
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else {
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return create(slot_7[gen.getByte() & 3], gen);
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if (false && isFirst) {
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return create(&LightInstructionInfo::IMUL_C, gen);
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} else {
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return create(slot_7[gen.getByte() & 1], gen);
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}
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case 10:
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return create(slot_10, gen);
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@ -664,7 +673,11 @@ namespace RandomX {
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constexpr int V4_SRC_INDEX_BITS = 3;
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constexpr int V4_DST_INDEX_BITS = 3;
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constexpr int CYCLE_MAP_SIZE = RANDOMX_LPROG_LATENCY + 3;
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#ifndef _DEBUG
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constexpr bool TRACE = false;
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#else
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constexpr bool TRACE = true;
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#endif
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static int blakeCounter = 0;
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@ -803,7 +816,7 @@ namespace RandomX {
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constexpr int MAX_ATTEMPTS = 4;
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while(!portsSaturated) {
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fetchLine = fetchLine->fetchNext(currentInstruction.getType(), gen);
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fetchLine = fetchLine->fetchNext(currentInstruction.getType(), cycle, mulCount, gen);
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if (TRACE) std::cout << "; ------------- fetch cycle " << cycle << " (" << fetchLine->getName() << ")" << std::endl;
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mopIndex = 0;
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@ -813,7 +826,7 @@ namespace RandomX {
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if (instrIndex >= currentInstruction.getInfo().getSize()) {
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if (portsSaturated)
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break;
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currentInstruction = LightInstruction::createForSlot(gen, fetchLine->getCounts()[mopIndex], fetchLine->getSize() == mopIndex + 1, fetchLine->getIndex() == 0 && mopIndex == 0);
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currentInstruction = LightInstruction::createForSlot(gen, fetchLine->getCounts()[mopIndex], fetchLine->getIndex(), fetchLine->getSize() == mopIndex + 1, mopIndex == 0);
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instrIndex = 0;
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if (TRACE) std::cout << "; " << currentInstruction.getInfo().getName() << std::endl;
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}
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@ -1,8 +1,8 @@
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;xor r8, qword ptr [rbx+0]
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;xor r9, qword ptr [rbx+8]
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;xor r10, qword ptr [rbx+16]
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;xor r11, qword ptr [rbx+24]
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;xor r12, qword ptr [rbx+32]
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;xor r13, qword ptr [rbx+40]
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;xor r14, qword ptr [rbx+48]
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;xor r15, qword ptr [rbx+56]
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xor r8, qword ptr [rbx+0]
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xor r9, qword ptr [rbx+8]
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xor r10, qword ptr [rbx+16]
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xor r11, qword ptr [rbx+24]
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xor r12, qword ptr [rbx+32]
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xor r13, qword ptr [rbx+40]
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xor r14, qword ptr [rbx+48]
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xor r15, qword ptr [rbx+56]
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@ -1,4 +1,4 @@
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and rbx, 4194303
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shl rbx, 6
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add rbx, rdi
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; prefetchnta byte ptr [rbx]
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prefetchnta byte ptr [rbx]
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@ -37,7 +37,7 @@ along with RandomX. If not, see<http://www.gnu.org/licenses/>.
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//Number of random Cache accesses per Dataset block. Minimum is 2.
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#define RANDOMX_CACHE_ACCESSES 8
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#define RANDOMX_LPROG_LATENCY 130
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#define RANDOMX_LPROG_LATENCY 170
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#define RANDOMX_LPROG_ASIC_LATENCY 84
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#define RANDOMX_LPROG_MIN_SIZE 225
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#define RANDOMX_LPROG_MAX_SIZE 512
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