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Implemented cache shift
Fixed assembly code generator Fixed an error in the interpreter Updated specification: sign-extended immediates
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11 changed files with 121 additions and 69 deletions
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@ -33,7 +33,7 @@ The first operand is read from memory. The location is determined by the `loc(a)
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Flag `reg(a)` encodes an integer register `r0`-`r7`. The read address is calculated as:
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```
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reg(a)[31:0] = reg(a)[31:0] XOR addr0
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reg(a) = reg(a) XOR signExtend(addr0)
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addr(a) = reg(a)[W-1:0]
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```
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`W` is the address width from the above table. For reading from the scratchpad, `addr(a)` is multiplied by 8 for 8-byte aligned access.
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@ -54,7 +54,7 @@ The second operand is loaded either from a register or from an immediate value e
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`imm0` is an 8-bit immediate value, which is used for shift and rotate ALU operations.
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`imm1` is a 32-bit immediate value which is used for most operations. For operands larger than 32 bits, the value is zero-extended for unsigned instructions and sign-extended for signed instructions. For FPU instructions, the value is considered a signed 32-bit integer and then converted to a double precision floating point format.
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`imm1` is a 32-bit immediate value which is used for most operations. For operands larger than 32 bits, the value is sign-extended. For FPU instructions, the value is considered a signed 32-bit integer and then converted to a double precision floating point format.
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#### Operand C
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The third operand is the location where the result is stored.
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@ -80,7 +80,7 @@ addr(c) = 8 * (addr1 XOR reg(c)[31:0])[W-1:0]
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An 8-bit immediate value that is used as the shift/rotate count by some ALU instructions and as the jump offset of the CALL instruction.
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#### addr0
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A 32-bit address mask that is used to calculate the read address for the A operand.
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A 32-bit address mask that is used to calculate the read address for the A operand. It's sign-extended to 64 bits.
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#### addr1
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A 32-bit address mask that is used to calculate the write address for the C operand. `addr1` is equal to `imm1`.
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