mirror of
https://git.wownero.com/wownero/RandomWOW.git
synced 2024-08-15 00:23:14 +00:00
Fix header dependency of superscalar_program.hpp
Fix tests Fix a typo in design.md
This commit is contained in:
parent
e6ba0a1b7d
commit
1f62d787ad
5 changed files with 290 additions and 266 deletions
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@ -426,7 +426,7 @@ The following 10 designs were simulated and the average number of clock cycles t
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|-------|-----------|----------|---------------|-----------------------|---|
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|#1|1 EXU + 1 MEM|in-order|non-speculative|293|0.87|
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|#2|1 EXU + 1 MEM|in-order|speculative|262|0.98|
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|#3|1 EXU + 1 MEM|in-order|non-speculative|197|1.3|
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|#3|2 EXU + 1 MEM|in-order|non-speculative|197|1.3|
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|#4|2 EXU + 1 MEM|in-order|speculative|161|1.6|
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|#5|2 EXU + 1 MEM|out-of-order|non-speculative|144|1.8|
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|#6|2 EXU + 1 MEM|out-of-order|speculative|122|2.1|
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@ -51,6 +51,7 @@ namespace randomx {
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ISMULH_R = 12, //1+2+1 0+(p1,p5)+0 3 3+3+3 (mov+imul+mov)
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IMUL_RCP = 13, //1+1 p015+p1 4 10+4 (mov+imul)
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COUNT = 14,
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INVALID = -1
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};
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@ -30,7 +30,7 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#include <cstdint>
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#include "instruction.hpp"
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#include "configuration.h"
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#include "common.hpp"
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namespace randomx {
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@ -321,7 +321,7 @@ int executeOutOfOrder(randomx::Program& p, randomx::Program& original, bool prin
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return cycle;
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}
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#include "../instruction_weights.hpp"
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#include "../bytecode_machine.hpp"
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//old register selection
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struct RegisterUsage {
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@ -355,284 +355,307 @@ int analyze(randomx::Program& p) {
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auto& instr = p(i);
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int opcode = instr.opcode;
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instr.opcode = 0;
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switch (opcode) {
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CASE_REP(IADD_RS) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_INT;
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instr.opcode |= DST_INT;
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(IADD_M) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_MEM;
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instr.opcode |= DST_INT;
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if (instr.src != instr.dst) {
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instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
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}
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else {
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instr.imm32 &= randomx::ScratchpadL3Mask;
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}
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registerUsage[instr.dst].lastUsed = i;
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} break;
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if (opcode < randomx::ceil_IADD_RS) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_INT;
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instr.opcode |= DST_INT;
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registerUsage[instr.dst].lastUsed = i;
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continue;
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}
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CASE_REP(ISUB_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_INT;
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instr.opcode |= SRC_INT;
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(ISUB_M) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_MEM;
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instr.opcode |= DST_INT;
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if (instr.src != instr.dst) {
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instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
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}
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else {
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instr.imm32 &= randomx::ScratchpadL3Mask;
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}
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(IMUL_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_INT;
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instr.opcode |= SRC_INT;
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(IMUL_M) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_MEM;
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instr.opcode |= DST_INT;
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if (instr.src != instr.dst) {
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instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
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}
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else {
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instr.imm32 &= randomx::ScratchpadL3Mask;
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}
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(IMULH_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_INT;
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instr.opcode |= SRC_INT;
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(IMULH_M) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_MEM;
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instr.opcode |= DST_INT;
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if (instr.src != instr.dst) {
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instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
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}
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else {
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instr.imm32 &= randomx::ScratchpadL3Mask;
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}
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(ISMULH_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_INT;
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instr.opcode |= SRC_INT;
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(ISMULH_M) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_MEM;
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instr.opcode |= DST_INT;
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if (instr.src != instr.dst) {
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instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
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}
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else {
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instr.imm32 &= randomx::ScratchpadL3Mask;
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}
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(IMUL_RCP) {
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uint64_t divisor = instr.getImm32();
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if (!randomx::isPowerOf2(divisor)) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.opcode |= DST_INT;
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registerUsage[instr.dst].lastUsed = i;
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}
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} break;
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CASE_REP(INEG_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.opcode |= DST_INT;
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(IXOR_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_INT;
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instr.opcode |= SRC_INT;
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(IXOR_M) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_MEM;
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instr.opcode |= DST_INT;
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if (instr.src != instr.dst) {
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instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
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}
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else {
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instr.imm32 &= randomx::ScratchpadL3Mask;
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}
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(IROR_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_INT;
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instr.opcode |= SRC_INT;
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(IROL_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_INT;
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instr.opcode |= SRC_INT;
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registerUsage[instr.dst].lastUsed = i;
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} break;
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CASE_REP(ISWAP_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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if (instr.src != instr.dst) {
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instr.opcode |= DST_INT;
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instr.opcode |= SRC_INT;
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instr.opcode |= OP_SWAP;
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registerUsage[instr.dst].lastUsed = i;
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registerUsage[instr.src].lastUsed = i;
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}
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} break;
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CASE_REP(FSWAP_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.opcode |= DST_FLT;
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} break;
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CASE_REP(FADD_R) {
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instr.dst = instr.dst % randomx::RegisterCountFlt;
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instr.opcode |= DST_FLT;
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instr.opcode |= OP_FLOAT;
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} break;
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CASE_REP(FADD_M) {
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instr.dst = instr.dst % randomx::RegisterCountFlt;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_FLT;
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instr.opcode |= SRC_MEM;
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instr.opcode |= OP_FLOAT;
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if (opcode < randomx::ceil_IADD_M) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_MEM;
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instr.opcode |= DST_INT;
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if (instr.src != instr.dst) {
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instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
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} break;
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}
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else {
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instr.imm32 &= randomx::ScratchpadL3Mask;
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}
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registerUsage[instr.dst].lastUsed = i;
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continue;
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}
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CASE_REP(FSUB_R) {
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instr.dst = instr.dst % randomx::RegisterCountFlt;
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instr.opcode |= DST_FLT;
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instr.opcode |= OP_FLOAT;
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} break;
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if (opcode < randomx::ceil_ISUB_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_INT;
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instr.opcode |= SRC_INT;
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registerUsage[instr.dst].lastUsed = i;
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continue;
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}
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CASE_REP(FSUB_M) {
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instr.dst = instr.dst % randomx::RegisterCountFlt;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_FLT;
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instr.opcode |= SRC_MEM;
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instr.opcode |= OP_FLOAT;
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if (opcode < randomx::ceil_ISUB_M) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_MEM;
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instr.opcode |= DST_INT;
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if (instr.src != instr.dst) {
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instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
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} break;
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}
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else {
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instr.imm32 &= randomx::ScratchpadL3Mask;
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}
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registerUsage[instr.dst].lastUsed = i;
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continue;
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}
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CASE_REP(FSCAL_R) {
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instr.dst = instr.dst % randomx::RegisterCountFlt;
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instr.opcode |= DST_FLT;
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} break;
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if (opcode < randomx::ceil_IMUL_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_INT;
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instr.opcode |= SRC_INT;
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registerUsage[instr.dst].lastUsed = i;
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continue;
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}
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CASE_REP(FMUL_R) {
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instr.dst = 4 + instr.dst % randomx::RegisterCountFlt;
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instr.opcode |= DST_FLT;
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instr.opcode |= OP_FLOAT;
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} break;
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CASE_REP(FDIV_M) {
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instr.dst = 4 + instr.dst % randomx::RegisterCountFlt;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_FLT;
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instr.opcode |= SRC_MEM;
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instr.opcode |= OP_FLOAT;
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if (opcode < randomx::ceil_IMUL_M) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_MEM;
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instr.opcode |= DST_INT;
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if (instr.src != instr.dst) {
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instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
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} break;
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}
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else {
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instr.imm32 &= randomx::ScratchpadL3Mask;
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}
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registerUsage[instr.dst].lastUsed = i;
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continue;
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}
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CASE_REP(FSQRT_R) {
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instr.dst = 4 + instr.dst % randomx::RegisterCountFlt;
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instr.opcode |= DST_FLT;
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instr.opcode |= OP_FLOAT;
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} break;
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if (opcode < randomx::ceil_IMULH_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_INT;
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instr.opcode |= SRC_INT;
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registerUsage[instr.dst].lastUsed = i;
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continue;
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}
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CASE_REP(CBRANCH) {
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instr.opcode |= OP_BRANCH;
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instr.opcode |= DST_INT;
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//jump condition
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//int reg = getConditionRegister(registerUsage);
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int reg = instr.dst % randomx::RegistersCount;
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int target = registerUsage[reg].lastUsed;
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int offset = (i - target);
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instr.mod = offset;
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jumpCount += offset;
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p(target + 1).opcode |= BRANCH_TARGET;
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registerUsage[reg].count++;
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instr.dst = reg;
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//mark all registers as used
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for (unsigned j = 0; j < randomx::RegistersCount; ++j) {
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registerUsage[j].lastUsed = i;
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}
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} break;
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if (opcode < randomx::ceil_IMULH_M) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_MEM;
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instr.opcode |= DST_INT;
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if (instr.src != instr.dst) {
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instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
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}
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else {
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instr.imm32 &= randomx::ScratchpadL3Mask;
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}
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registerUsage[instr.dst].lastUsed = i;
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continue;
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}
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CASE_REP(CFROUND) {
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_INT;
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instr.opcode |= OP_CFROUND;
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} break;
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if (opcode < randomx::ceil_ISMULH_R) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_INT;
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instr.opcode |= SRC_INT;
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registerUsage[instr.dst].lastUsed = i;
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continue;
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}
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CASE_REP(ISTORE) {
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if (opcode < randomx::ceil_ISMULH_M) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= SRC_MEM;
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instr.opcode |= DST_INT;
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if (instr.src != instr.dst) {
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instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
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}
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else {
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instr.imm32 &= randomx::ScratchpadL3Mask;
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}
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registerUsage[instr.dst].lastUsed = i;
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continue;
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}
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if (opcode < randomx::ceil_IMUL_RCP) {
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uint64_t divisor = instr.getImm32();
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if (!randomx::isPowerOf2(divisor)) {
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instr.dst = instr.dst % randomx::RegistersCount;
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instr.src = instr.src % randomx::RegistersCount;
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instr.opcode |= DST_MEM;
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if (instr.getModCond() < randomx::StoreL3Condition)
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instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
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else
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instr.imm32 &= randomx::ScratchpadL3Mask;
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} break;
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instr.opcode |= DST_INT;
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registerUsage[instr.dst].lastUsed = i;
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}
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continue;
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}
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CASE_REP(NOP) {
|
||||
if (opcode < randomx::ceil_INEG_R) {
|
||||
instr.dst = instr.dst % randomx::RegistersCount;
|
||||
instr.opcode |= DST_INT;
|
||||
registerUsage[instr.dst].lastUsed = i;
|
||||
continue;
|
||||
}
|
||||
|
||||
} break;
|
||||
if (opcode < randomx::ceil_IXOR_R) {
|
||||
instr.dst = instr.dst % randomx::RegistersCount;
|
||||
instr.src = instr.src % randomx::RegistersCount;
|
||||
instr.opcode |= DST_INT;
|
||||
instr.opcode |= SRC_INT;
|
||||
registerUsage[instr.dst].lastUsed = i;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_IXOR_M) {
|
||||
instr.dst = instr.dst % randomx::RegistersCount;
|
||||
instr.src = instr.src % randomx::RegistersCount;
|
||||
instr.opcode |= SRC_MEM;
|
||||
instr.opcode |= DST_INT;
|
||||
if (instr.src != instr.dst) {
|
||||
instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
|
||||
}
|
||||
else {
|
||||
instr.imm32 &= randomx::ScratchpadL3Mask;
|
||||
}
|
||||
registerUsage[instr.dst].lastUsed = i;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_IROR_R) {
|
||||
instr.dst = instr.dst % randomx::RegistersCount;
|
||||
instr.src = instr.src % randomx::RegistersCount;
|
||||
instr.opcode |= DST_INT;
|
||||
instr.opcode |= SRC_INT;
|
||||
registerUsage[instr.dst].lastUsed = i;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_IROL_R) {
|
||||
instr.dst = instr.dst % randomx::RegistersCount;
|
||||
instr.src = instr.src % randomx::RegistersCount;
|
||||
instr.opcode |= DST_INT;
|
||||
instr.opcode |= SRC_INT;
|
||||
registerUsage[instr.dst].lastUsed = i;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_ISWAP_R) {
|
||||
instr.dst = instr.dst % randomx::RegistersCount;
|
||||
instr.src = instr.src % randomx::RegistersCount;
|
||||
if (instr.src != instr.dst) {
|
||||
instr.opcode |= DST_INT;
|
||||
instr.opcode |= SRC_INT;
|
||||
instr.opcode |= OP_SWAP;
|
||||
registerUsage[instr.dst].lastUsed = i;
|
||||
registerUsage[instr.src].lastUsed = i;
|
||||
}
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_FSWAP_R) {
|
||||
instr.dst = instr.dst % randomx::RegistersCount;
|
||||
instr.opcode |= DST_FLT;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_FADD_R) {
|
||||
instr.dst = instr.dst % randomx::RegisterCountFlt;
|
||||
instr.opcode |= DST_FLT;
|
||||
instr.opcode |= OP_FLOAT;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_FADD_M) {
|
||||
instr.dst = instr.dst % randomx::RegisterCountFlt;
|
||||
instr.src = instr.src % randomx::RegistersCount;
|
||||
instr.opcode |= DST_FLT;
|
||||
instr.opcode |= SRC_MEM;
|
||||
instr.opcode |= OP_FLOAT;
|
||||
instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_FSUB_R) {
|
||||
instr.dst = instr.dst % randomx::RegisterCountFlt;
|
||||
instr.opcode |= DST_FLT;
|
||||
instr.opcode |= OP_FLOAT;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_FSUB_M) {
|
||||
instr.dst = instr.dst % randomx::RegisterCountFlt;
|
||||
instr.src = instr.src % randomx::RegistersCount;
|
||||
instr.opcode |= DST_FLT;
|
||||
instr.opcode |= SRC_MEM;
|
||||
instr.opcode |= OP_FLOAT;
|
||||
instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_FSCAL_R) {
|
||||
instr.dst = instr.dst % randomx::RegisterCountFlt;
|
||||
instr.opcode |= DST_FLT;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_FMUL_R) {
|
||||
instr.dst = 4 + instr.dst % randomx::RegisterCountFlt;
|
||||
instr.opcode |= DST_FLT;
|
||||
instr.opcode |= OP_FLOAT;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_FDIV_M) {
|
||||
instr.dst = 4 + instr.dst % randomx::RegisterCountFlt;
|
||||
instr.src = instr.src % randomx::RegistersCount;
|
||||
instr.opcode |= DST_FLT;
|
||||
instr.opcode |= SRC_MEM;
|
||||
instr.opcode |= OP_FLOAT;
|
||||
instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_FSQRT_R) {
|
||||
instr.dst = 4 + instr.dst % randomx::RegisterCountFlt;
|
||||
instr.opcode |= DST_FLT;
|
||||
instr.opcode |= OP_FLOAT;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_CBRANCH) {
|
||||
instr.opcode |= OP_BRANCH;
|
||||
instr.opcode |= DST_INT;
|
||||
int reg = instr.dst % randomx::RegistersCount;
|
||||
int target = registerUsage[reg].lastUsed;
|
||||
int offset = (i - target);
|
||||
instr.mod = offset;
|
||||
jumpCount += offset;
|
||||
p(target + 1).opcode |= BRANCH_TARGET;
|
||||
registerUsage[reg].count++;
|
||||
instr.dst = reg;
|
||||
//mark all registers as used
|
||||
for (unsigned j = 0; j < randomx::RegistersCount; ++j) {
|
||||
registerUsage[j].lastUsed = i;
|
||||
}
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_CFROUND) {
|
||||
instr.src = instr.src % randomx::RegistersCount;
|
||||
instr.opcode |= SRC_INT;
|
||||
instr.opcode |= OP_CFROUND;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_ISTORE) {
|
||||
instr.dst = instr.dst % randomx::RegistersCount;
|
||||
instr.src = instr.src % randomx::RegistersCount;
|
||||
instr.opcode |= DST_MEM;
|
||||
if (instr.getModCond() < randomx::StoreL3Condition)
|
||||
instr.imm32 = (instr.getModMem() ? randomx::ScratchpadL1Mask : randomx::ScratchpadL2Mask);
|
||||
else
|
||||
instr.imm32 &= randomx::ScratchpadL3Mask;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (opcode < randomx::ceil_NOP) {
|
||||
|
||||
default:
|
||||
UNREACHABLE;
|
||||
}
|
||||
}
|
||||
return jumpCount;
|
||||
|
|
|
@ -8,7 +8,7 @@ const uint8_t seed[32] = { 191, 182, 222, 175, 249, 89, 134, 104, 241, 68, 191,
|
|||
int main() {
|
||||
|
||||
constexpr int count = 1000000;
|
||||
int isnCounts[randomx::SuperscalarInstructionType::COUNT] = { 0 };
|
||||
int isnCounts[(int)randomx::SuperscalarInstructionType::COUNT] = { 0 };
|
||||
int64_t asicLatency = 0;
|
||||
int64_t codesize = 0;
|
||||
int64_t cpuLatency = 0;
|
||||
|
@ -44,7 +44,7 @@ int main() {
|
|||
std::cout << "Avg. RandomX ops: " << (size / (double)count) << std::endl;
|
||||
|
||||
std::cout << "Frequencies: " << std::endl;
|
||||
for (unsigned j = 0; j < randomx::SuperscalarInstructionType::COUNT; ++j) {
|
||||
for (unsigned j = 0; j < (int)randomx::SuperscalarInstructionType::COUNT; ++j) {
|
||||
std::cout << j << " " << isnCounts[j] << " " << isnCounts[j] / (double)size << std::endl;
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in a new issue