mirror of
https://git.wownero.com/wownero/RandomWOW.git
synced 2024-08-15 00:23:14 +00:00
Updated documentation
This commit is contained in:
parent
42cb2fc852
commit
1029098719
4 changed files with 10 additions and 6 deletions
|
@ -65,9 +65,9 @@ RandomX uses double precision floating point operations, which are supported by
|
||||||
|
|
||||||
RandomX uses five operations that are guaranteed by the IEEE 754 standard to give correctly rounded results: addition, subtraction, multiplication, division and square root. All 4 rounding modes defined by the standard are used.
|
RandomX uses five operations that are guaranteed by the IEEE 754 standard to give correctly rounded results: addition, subtraction, multiplication, division and square root. All 4 rounding modes defined by the standard are used.
|
||||||
|
|
||||||
The domains of floating point operations are separated into "additive" operations, which use register group F and "multiplicative" operations, which use register group E. This is done to prevent addition/subtraction from becoming no-op when a small number is added to a large number. Since the range of the F group registers is limited to around `±1.0E+12`, adding or subtracting a floating point number with absolute value larger than 1 always changes at least 12 mantissa bits.
|
The domains of floating point operations are separated into "additive" operations, which use register group F and "multiplicative" operations, which use register group E. This is done to prevent addition/subtraction from becoming no-op when a small number is added to a large number. Since the range of the F group registers is limited to around `±3.0e+14`, adding or subtracting a floating point number with absolute value larger than 1 always changes at least 5 fraction bits.
|
||||||
|
|
||||||
Because the limited range of group F registers allows more efficient fixed-point implementation (with 85-bit numbers), the FSCAL instruction manipulates the binary representation of the floating point format to make this optimization more difficult.
|
Because the limited range of group F registers would allow the use of a more efficient fixed-point representation (with 80-bit numbers), the FSCAL instruction manipulates the binary representation of the floating point format to make this optimization more difficult.
|
||||||
|
|
||||||
Group E registers are restricted to positive values, which avoids `NaN` results (such as square root of a negative number or `0 * ∞`). Division uses only memory source operand to avoid being optimized into multiplication by constant reciprocal. The exponent of group E operands is set to a value between -255 and 0 to avoid division and multiplication by 0 and to increase the range of numbers that can be obtained. The approximate range of possible group E register values is `1.7E-77` to `infinity`.
|
Group E registers are restricted to positive values, which avoids `NaN` results (such as square root of a negative number or `0 * ∞`). Division uses only memory source operand to avoid being optimized into multiplication by constant reciprocal. The exponent of group E operands is set to a value between -255 and 0 to avoid division and multiplication by 0 and to increase the range of numbers that can be obtained. The approximate range of possible group E register values is `1.7E-77` to `infinity`.
|
||||||
|
|
||||||
|
|
|
@ -260,7 +260,7 @@ Integer registers `r0`-`r7` can be the source or the destination operands of int
|
||||||
|
|
||||||
Floating point registers `a0`-`a3` are read-only and their value is fixed for a given VM program. They can be the source operand of any floating point instruction. The value of these registers is restricted to the interval `[1, 4294967296)`.
|
Floating point registers `a0`-`a3` are read-only and their value is fixed for a given VM program. They can be the source operand of any floating point instruction. The value of these registers is restricted to the interval `[1, 4294967296)`.
|
||||||
|
|
||||||
Floating point registers `f0`-`f3` are the "additive" registers, which can be the destination of floating point addition and subtraction instructions. The absolute value of these registers will not exceed `1.0e+12`.
|
Floating point registers `f0`-`f3` are the "additive" registers, which can be the destination of floating point addition and subtraction instructions. The absolute value of these registers will not exceed about `3.0e+14`.
|
||||||
|
|
||||||
Floating point registers `e0`-`e3` are the "multiplicative" registers, which can be the destination of floating point multiplication, division and square root instructions. Their value is always positive.
|
Floating point registers `e0`-`e3` are the "multiplicative" registers, which can be the destination of floating point multiplication, division and square root instructions. Their value is always positive.
|
||||||
|
|
||||||
|
@ -574,9 +574,9 @@ Double precision floating point addition. FADD_R uses a group A register source
|
||||||
Double precision floating point subtraction. FSUB_R uses a group A register source operand, FSUB_M uses a memory operand.
|
Double precision floating point subtraction. FSUB_R uses a group A register source operand, FSUB_M uses a memory operand.
|
||||||
|
|
||||||
#### 5.3.4 FSCAL_R
|
#### 5.3.4 FSCAL_R
|
||||||
This instruction negates the number and multiplies it by <code>2<sup>x</sup></code>. `x` is calculated by taking the 5 least significant digits of the biased exponent and interpreting them as a binary number using the digit set `{+1, -1}` as opposed to the traditional `{0, 1}`. The possible values of `x` are all odd numbers from -31 to +31.
|
This instruction negates the number and multiplies it by <code>2<sup>x</sup></code>. `x` is calculated by taking the 4 least significant digits of the biased exponent and interpreting them as a binary number using the digit set `{+1, -1}` as opposed to the traditional `{0, 1}`. The possible values of `x` are all odd numbers from -15 to +15.
|
||||||
|
|
||||||
The mathematical operation described above is equivalent to a bitwise XOR of the binary representation with the value of `0x81F0000000000000`.
|
The mathematical operation described above is equivalent to a bitwise XOR of the binary representation with the value of `0x80F0000000000000`.
|
||||||
|
|
||||||
#### 5.3.5 FMUL_R
|
#### 5.3.5 FMUL_R
|
||||||
|
|
||||||
|
|
|
@ -64,7 +64,7 @@ void printUsage(const char* executable) {
|
||||||
std::cout << "Usage: " << executable << " [OPTIONS]" << std::endl;
|
std::cout << "Usage: " << executable << " [OPTIONS]" << std::endl;
|
||||||
std::cout << "Supported options:" << std::endl;
|
std::cout << "Supported options:" << std::endl;
|
||||||
std::cout << " --help shows this message" << std::endl;
|
std::cout << " --help shows this message" << std::endl;
|
||||||
std::cout << " --mine mining mode: 2 GiB" << std::endl;
|
std::cout << " --mine mining mode: 2080 MiB" << std::endl;
|
||||||
std::cout << " --verify verification mode: 256 MiB" << std::endl;
|
std::cout << " --verify verification mode: 256 MiB" << std::endl;
|
||||||
std::cout << " --jit x86-64 JIT compiled mode (default: interpreter)" << std::endl;
|
std::cout << " --jit x86-64 JIT compiled mode (default: interpreter)" << std::endl;
|
||||||
std::cout << " --largePages use large pages" << std::endl;
|
std::cout << " --largePages use large pages" << std::endl;
|
||||||
|
@ -165,6 +165,9 @@ int main(int argc, char** argv) {
|
||||||
Stopwatch sw(true);
|
Stopwatch sw(true);
|
||||||
cache = randomx_alloc_cache(flags);
|
cache = randomx_alloc_cache(flags);
|
||||||
if (cache == nullptr) {
|
if (cache == nullptr) {
|
||||||
|
if (jit) {
|
||||||
|
throw std::runtime_error("JIT compilation is not supported or cache allocation failed");
|
||||||
|
}
|
||||||
throw std::runtime_error("Cache allocation failed");
|
throw std::runtime_error("Cache allocation failed");
|
||||||
}
|
}
|
||||||
randomx_init_cache(cache, &seed, sizeof(seed));
|
randomx_init_cache(cache, &seed, sizeof(seed));
|
||||||
|
|
|
@ -95,6 +95,7 @@
|
||||||
<IntrinsicFunctions>true</IntrinsicFunctions>
|
<IntrinsicFunctions>true</IntrinsicFunctions>
|
||||||
<SDLCheck>false</SDLCheck>
|
<SDLCheck>false</SDLCheck>
|
||||||
<ConformanceMode>true</ConformanceMode>
|
<ConformanceMode>true</ConformanceMode>
|
||||||
|
<EnableEnhancedInstructionSet>NoExtensions</EnableEnhancedInstructionSet>
|
||||||
</ClCompile>
|
</ClCompile>
|
||||||
<Link>
|
<Link>
|
||||||
<EnableCOMDATFolding>true</EnableCOMDATFolding>
|
<EnableCOMDATFolding>true</EnableCOMDATFolding>
|
||||||
|
|
Loading…
Reference in a new issue