2018-12-18 21:00:58 +00:00
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/*
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Copyright (c) 2018 tevador
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This file is part of RandomX.
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RandomX is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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RandomX is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with RandomX. If not, see<http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include "common.hpp"
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#include "Instruction.hpp"
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#include "superscalar_program.hpp"
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2018-12-18 21:00:58 +00:00
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#include <cstring>
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#include <vector>
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2019-04-20 09:08:01 +00:00
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namespace randomx {
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2019-02-09 14:45:26 +00:00
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class Program;
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class ProgramConfiguration;
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class SuperscalarProgram;
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2018-12-18 21:00:58 +00:00
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class JitCompilerX86;
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typedef void(JitCompilerX86::*InstructionGeneratorX86)(Instruction&, int);
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2018-12-18 21:00:58 +00:00
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constexpr uint32_t CodeSize = 64 * 1024;
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class JitCompilerX86 {
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public:
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JitCompilerX86();
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~JitCompilerX86();
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void generateProgram(Program&, ProgramConfiguration&);
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void generateProgramLight(Program&, ProgramConfiguration&);
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template<size_t N>
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void generateSuperscalarHash(SuperscalarProgram (&programs)[N], std::vector<uint64_t> &);
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void generateDatasetInitCode();
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ProgramFunc getProgramFunc() {
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return (ProgramFunc)code;
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}
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DatasetInitFunc getDatasetInitFunc() {
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return (DatasetInitFunc)code;
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}
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uint8_t* getCode() {
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return code;
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}
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size_t getCodeSize();
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private:
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static InstructionGeneratorX86 engine[256];
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std::vector<int32_t> instructionOffsets;
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int registerUsage[8];
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uint8_t* code;
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int32_t codePos;
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void generateProgramPrologue(Program&, ProgramConfiguration&);
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void generateProgramEpilogue(Program&);
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int getConditionRegister();
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void genAddressReg(Instruction&, bool);
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void genAddressRegDst(Instruction&, bool);
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void genAddressImm(Instruction&);
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void genSIB(int scale, int index, int base);
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void handleCondition(Instruction&, int);
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void generateCode(Instruction&, int);
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void generateSuperscalarCode(Instruction &, std::vector<uint64_t> &);
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void emitByte(uint8_t val) {
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code[codePos] = val;
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codePos++;
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}
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void emit32(uint32_t val) {
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code[codePos + 0] = val;
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code[codePos + 1] = val >> 8;
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code[codePos + 2] = val >> 16;
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code[codePos + 3] = val >> 24;
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codePos += 4;
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}
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void emit64(uint64_t val) {
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code[codePos + 0] = val;
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code[codePos + 1] = val >> 8;
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code[codePos + 2] = val >> 16;
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code[codePos + 3] = val >> 24;
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code[codePos + 4] = val >> 32;
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code[codePos + 5] = val >> 40;
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code[codePos + 6] = val >> 48;
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code[codePos + 7] = val >> 56;
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codePos += 8;
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}
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template<size_t N>
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void emit(const uint8_t (&src)[N]) {
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emit(src, N);
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}
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void emit(const uint8_t* src, size_t count) {
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memcpy(code + codePos, src, count);
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codePos += count;
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}
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void h_IADD_RS(Instruction&, int);
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void h_IADD_M(Instruction&, int);
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void h_IADD_RC(Instruction&, int);
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void h_ISUB_R(Instruction&, int);
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void h_ISUB_M(Instruction&, int);
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void h_IMUL_9C(Instruction&, int);
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void h_IMUL_R(Instruction&, int);
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void h_IMUL_M(Instruction&, int);
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void h_IMULH_R(Instruction&, int);
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void h_IMULH_M(Instruction&, int);
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void h_ISMULH_R(Instruction&, int);
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void h_ISMULH_M(Instruction&, int);
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void h_IMUL_RCP(Instruction&, int);
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void h_ISDIV_C(Instruction&, int);
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void h_INEG_R(Instruction&, int);
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void h_IXOR_R(Instruction&, int);
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void h_IXOR_M(Instruction&, int);
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void h_IROR_R(Instruction&, int);
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void h_IROL_R(Instruction&, int);
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void h_ISWAP_R(Instruction&, int);
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void h_FSWAP_R(Instruction&, int);
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void h_FADD_R(Instruction&, int);
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void h_FADD_M(Instruction&, int);
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void h_FSUB_R(Instruction&, int);
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void h_FSUB_M(Instruction&, int);
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void h_FSCAL_R(Instruction&, int);
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void h_FMUL_R(Instruction&, int);
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void h_FMUL_M(Instruction&, int);
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void h_FDIV_R(Instruction&, int);
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void h_FDIV_M(Instruction&, int);
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void h_FSQRT_R(Instruction&, int);
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void h_COND_R(Instruction&, int);
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void h_COND_M(Instruction&, int);
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void h_CFROUND(Instruction&, int);
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void h_ISTORE(Instruction&, int);
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void h_FSTORE(Instruction&, int);
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void h_NOP(Instruction&, int);
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};
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}
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