Some vague interrupt stuff
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Gitea
parent
f15f5f4fc4
commit
a4d05189ff
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@ -0,0 +1,154 @@
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global irq0
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global irq1
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global irq2
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global irq3
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global irq4
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global irq5
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global irq6
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global irq7
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global irq8
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global irq9
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global irq10
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global irq11
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global irq12
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global irq13
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global irq14
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global irq15
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global load_idt
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global irq0_handler
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global irq1_handler
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global irq2_handler
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global irq3_handler
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global irq4_handler
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global irq5_handler
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global irq6_handler
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global irq7_handler
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global irq8_handler
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global irq9_handler
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global irq10_handler
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global irq11_handler
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global irq12_handler
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global irq13_handler
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global irq14_handler
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global irq15_handler
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extern irq0_handler
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extern irq1_handler
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extern irq2_handler
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extern irq3_handler
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extern irq4_handler
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extern irq5_handler
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extern irq6_handler
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extern irq7_handler
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extern irq8_handler
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extern irq9_handler
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extern irq10_handler
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extern irq11_handler
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extern irq12_handler
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extern irq13_handler
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extern irq14_handler
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extern irq15_handler
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irq0:
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pusha
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call irq0_handler
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popa
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iret
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irq1:
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pusha
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call irq1_handler
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popa
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iret
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irq2:
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pusha
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call irq2_handler
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popa
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iret
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irq3:
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pusha
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call irq3_handler
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popa
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iret
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irq4:
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pusha
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call irq4_handler
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popa
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iret
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irq5:
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pusha
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call irq5_handler
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popa
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iret
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irq6:
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pusha
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call irq6_handler
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popa
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iret
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irq7:
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pusha
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call irq7_handler
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popa
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iret
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irq8:
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pusha
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call irq8_handler
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popa
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iret
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irq9:
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pusha
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call irq9_handler
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popa
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iret
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irq10:
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pusha
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call irq10_handler
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popa
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iret
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irq11:
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pusha
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call irq11_handler
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popa
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iret
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irq12:
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pusha
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call irq12_handler
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popa
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iret
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irq13:
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pusha
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call irq13_handler
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popa
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iret
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irq14:
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pusha
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call irq14_handler
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popa
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iret
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irq15:
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pusha
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call irq15_handler
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popa
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iret
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load_idt:
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mov 4(%esp), %edx
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lidt %edx
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sti
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ret
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@ -0,0 +1,273 @@
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#include <kernel/interrupt.h>
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void idt_init(void) {
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extern int load_idt();
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extern int irq0();
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extern int irq1();
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extern int irq2();
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extern int irq3();
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extern int irq4();
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extern int irq5();
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extern int irq6();
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extern int irq7();
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extern int irq8();
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extern int irq9();
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extern int irq10();
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extern int irq11();
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extern int irq12();
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extern int irq13();
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extern int irq14();
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extern int irq15();
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unsigned long irq0_address;
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unsigned long irq1_address;
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unsigned long irq2_address;
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unsigned long irq3_address;
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unsigned long irq4_address;
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unsigned long irq5_address;
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unsigned long irq6_address;
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unsigned long irq7_address;
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unsigned long irq8_address;
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unsigned long irq9_address;
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unsigned long irq10_address;
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unsigned long irq11_address;
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unsigned long irq12_address;
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unsigned long irq13_address;
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unsigned long irq14_address;
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unsigned long irq15_address;
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unsigned long idt_address;
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unsigned long idt_ptr[2];
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/* remap PIC */
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outb(0x20, 0x11);
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outb(0xA0, 0x11);
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outb(0x21, 0x20);
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outb(0xA1, 40);
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outb(0x21, 0x04);
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outb(0xA1, 0x02);
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outb(0x21, 0x01);
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outb(0xA1, 0x01);
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outb(0x21, 0x0);
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outb(0xA1, 0x0);
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irq0_address = (unsigned long) irq0;
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IDT[32].offset_lowerbits = irq0_address & 0xffff;
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IDT[32].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[32].zero = 0;
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IDT[32].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[32].offset_higherbits = (irq0_address & 0xffff0000) >> 16;
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irq1_address = (unsigned long) irq1;
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IDT[33].offset_lowerbits = irq1_address & 0xffff;
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IDT[33].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[33].zero = 0;
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IDT[33].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[33].offset_higherbits = (irq1_address & 0xffff0000) >> 16;
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irq2_address = (unsigned long) irq2;
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IDT[34].offset_lowerbits = irq2_address & 0xffff;
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IDT[34].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[34].zero = 0;
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IDT[34].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[34].offset_higherbits = (irq2_address & 0xffff0000) >> 16;
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irq3_address = (unsigned long) irq3;
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IDT[35].offset_lowerbits = irq3_address & 0xffff;
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IDT[35].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[35].zero = 0;
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IDT[35].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[35].offset_higherbits = (irq3_address & 0xffff0000) >> 16;
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irq4_address = (unsigned long) irq4;
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IDT[36].offset_lowerbits = irq4_address & 0xffff;
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IDT[36].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[36].zero = 0;
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IDT[36].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[36].offset_higherbits = (irq4_address & 0xffff0000) >> 16;
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irq5_address = (unsigned long) irq5;
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IDT[37].offset_lowerbits = irq5_address & 0xffff;
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IDT[37].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[37].zero = 0;
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IDT[37].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[37].offset_higherbits = (irq5_address & 0xffff0000) >> 16;
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irq6_address = (unsigned long) irq6;
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IDT[38].offset_lowerbits = irq6_address & 0xffff;
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IDT[38].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[38].zero = 0;
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IDT[38].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[38].offset_higherbits = (irq6_address & 0xffff0000) >> 16;
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irq7_address = (unsigned long) irq7;
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IDT[39].offset_lowerbits = irq7_address & 0xffff;
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IDT[39].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[39].zero = 0;
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IDT[39].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[39].offset_higherbits = (irq7_address & 0xffff0000) >> 16;
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irq0_address = (unsigned long) irq0;
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IDT[40].offset_lowerbits = irq0_address & 0xffff;
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IDT[40].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[40].zero = 0;
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IDT[40].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[40].offset_higherbits = (irq0_address & 0xffff0000) >> 16;
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irq8_address = (unsigned long) irq8;
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IDT[41].offset_lowerbits = irq8_address & 0xffff;
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IDT[41].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[41].zero = 0;
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IDT[41].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[41].offset_higherbits = (irq8_address & 0xffff0000) >> 16;
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irq0_address = (unsigned long) irq0;
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IDT[42].offset_lowerbits = irq0_address & 0xffff;
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IDT[42].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[42].zero = 0;
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IDT[42].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[42].offset_higherbits = (irq0_address & 0xffff0000) >> 16;
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irq9_address = (unsigned long) irq9;
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IDT[43].offset_lowerbits = irq9_address & 0xffff;
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IDT[43].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[43].zero = 0;
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IDT[43].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[43].offset_higherbits = (irq9_address & 0xffff0000) >> 16;
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irq10_address = (unsigned long) irq10;
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IDT[44].offset_lowerbits = irq10_address & 0xffff;
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IDT[44].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[44].zero = 0;
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IDT[44].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[44].offset_higherbits = (irq10_address & 0xffff0000) >> 16;
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irq11_address = (unsigned long) irq11;
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IDT[45].offset_lowerbits = irq11_address & 0xffff;
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IDT[45].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[45].zero = 0;
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IDT[45].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[45].offset_higherbits = (irq11_address & 0xffff0000) >> 16;
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irq12_address = (unsigned long) irq12;
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IDT[46].offset_lowerbits = irq12_address & 0xffff;
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IDT[46].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[46].zero = 0;
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IDT[46].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[46].offset_higherbits = (irq12_address & 0xffff0000) >> 16;
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irq13_address = (unsigned long) irq13;
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IDT[47].offset_lowerbits = irq13_address & 0xffff;
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IDT[47].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[47].zero = 0;
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IDT[47].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[47].offset_higherbits = (irq13_address & 0xffff0000) >> 16;
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irq14_address = (unsigned long) irq14;
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IDT[48].offset_lowerbits = irq14_address & 0xffff;
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IDT[48].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[48].zero = 0;
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IDT[48].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[48].offset_higherbits = (irq14_address & 0xffff0000) >> 16;
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irq15_address = (unsigned long) irq15;
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IDT[49].offset_lowerbits = irq15_address & 0xffff;
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IDT[49].selector = 0x08; /* KERNEL_CODE_SEGMENT OFFSET */
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IDT[49].zero = 0;
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IDT[49].type_attr = 0x8e; /* INTERRUPT_GATE */
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IDT[49].offset_higherbits = (irq15_address & 0xffff0000) >> 16;
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/* Fill IDT descriptor */
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idt_address = (unsigned long)IDT;
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idt_ptr[0] = (sizeof(struct IDT_entry) * 256) + ((idt_address & 0xffff) << 16);
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idt_ptr[1] = idt_address >> 16;
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load_idt(idt_ptr);
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}
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/* Programmable Interrupt Timer Interrupt */
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void irq0_handler(void) {
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outb(0x20, 0x20); /* End of interrupt */
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}
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/* Keyboard Interrupt */
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void irq1_handler(void) {
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outb(0x20, 0x20);
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}
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/* Cascade. Can probably be ignored. */
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void irq2_handler(void) {
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outb(0x20, 0x20);
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}
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/* COM2 (Serial Port) */
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void irq3_handler(void) {
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outb(0x20, 0x20);
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}
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/* COM1 (Serial Port) */
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void irq4_handler(void) {
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outb(0x20, 0x20);
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}
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/* LPT2 (Parallel Port) */
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void irq5_handler(void) {
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outb(0x20, 0x20);
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}
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/* Floppy Disk */
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void irq6_handler(void) {
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outb(0x20, 0x20);
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}
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/* LPT1 (Parallel Port)/Primary PIC Spurious Interrupts */
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void irq7_handler(void) {
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outb(0x20, 0x20); /* Don't send this for spurious interrupts */
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}
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/* CMOS RTC */
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void irq8_handler(void) {
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outb(0xA0, 0x20);
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outb(0x20, 0x20);
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}
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/* Peripherals/Legacy SCSI/NIC */
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void irq9_handler(void) {
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outb(0xA0, 0x20);
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outb(0x20, 0x20);
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}
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/* Peripherals/SCSI/NIC */
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void irq10_handler(void) {
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outb(0xA0, 0x20);
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outb(0x20, 0x20);
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}
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/* Peripherals/SCSI/NIC */
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void irq11_handler(void) {
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outb(0xA0, 0x20);
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outb(0x20, 0x20);
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}
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/* PS2 Mouse */
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void irq12_handler(void) {
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outb(0xA0, 0x20);
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outb(0x20, 0x20);
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}
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/* FPU/Coprocessor/Inter-processor */
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void irq13_handler(void) {
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outb(0xA0, 0x20);
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outb(0x20, 0x20);
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}
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/* Primary ATA Hard Drive */
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void irq14_handler(void) {
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outb(0xA0, 0x20);
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outb(0x20, 0x20);
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}
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/* Secondary ATA Hard Drive/Secondary PIC Spurious Interrupt */
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void irq15_handler(void) {
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outb(0xA0, 0x20);
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outb(0x20, 0x20);
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}
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@ -0,0 +1,16 @@
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#ifndef _KERNEL_INTERRUPT
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#define _KERNEL_INTERRUPT
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struct IDT_entry {
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unsigned short int offset_lowerbits;
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unsigned short int selector;
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unsigned char zero;
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unsigned char type_attr;
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unsigned short int offset_higherbits;
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};
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struct IDT_entry IDT[256];
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void idt_init(void);
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#endif
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