4ddba62d4b
Squashed from work; the fine-grained history is under tag archive/work-2026-08-29: - mp* wave: mpwm window manager + the mp app family, WM API, theme bridge, PDF engine fix - mpwm polish wave: terminal key focus, focus-history close order, pop-back-to-origin, occupied-workspace cycling, demo - work: land the sources the last commits reference - route: the assistant icon the committed UI references - fast_inflate: the benches name their dev-deps - gif/weezl: drop the vendored benches nobody can run - weezl: the decode tests generate their own LZW fixture
327 lines
12 KiB
Rust
327 lines
12 KiB
Rust
//! Layer: slots.
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//!
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//! Adversarial tests for v128 values interacting with stitch's stack-slot
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//! and register allocation. A v128 occupies exactly one 16-byte stack slot
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//! (see stack.rs) and is never register-resident; these tests attack the
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//! places where that could go wrong: results aliasing their own input
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//! slots, register preservation around v128 ops, packed values living
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//! across branches, merges and loop back-edges, deep expression nesting,
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//! and v128 crossing call frames.
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//!
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//! All modules are written in WAT (encoded with the `wast` crate) using
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//! only spec SIMD instructions, so failures localize to the v128 execution
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//! machinery, not to the decoder or the nonstandard ops.
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use makepad_stitch::{Engine, Instance, Linker, Module, Store, V128, Val};
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struct Rig {
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store: Store,
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instance: Instance,
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}
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impl Rig {
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fn new(wat: &str) -> Rig {
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let buf = wast::parser::ParseBuffer::new(wat).unwrap();
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let mut wat = wast::parser::parse::<wast::Wat>(&buf).unwrap();
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let bytes = wat.encode().unwrap();
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let engine = Engine::new();
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let mut store = Store::new(engine.clone());
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let module = Module::new(&engine, &bytes).unwrap();
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let instance = Linker::new().instantiate(&mut store, &module).unwrap();
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Rig { store, instance }
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}
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fn call_v(&mut self, name: &str, args: &[Val]) -> [f32; 4] {
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let func = self.instance.exported_func(name).unwrap();
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let mut results = [Val::V128(V128::ZERO)];
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func.call(&mut self.store, args, &mut results).unwrap();
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results[0].to_v128().unwrap().to_f32x4()
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}
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fn call_f32(&mut self, name: &str, args: &[Val]) -> f32 {
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let func = self.instance.exported_func(name).unwrap();
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let mut results = [Val::F32(0.0)];
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func.call(&mut self.store, args, &mut results).unwrap();
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results[0].to_f32().unwrap()
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}
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}
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fn v(lanes: [f32; 4]) -> Val {
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Val::V128(V128::from_f32x4(lanes))
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}
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/// Result slot aliasing an input slot: `a = a.yzxw * a` style — the result
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/// of the shuffle lands in a temp that the multiply then reuses as its own
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/// destination.
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#[test]
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fn slot_alias_shuffle_self_multiply() {
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let mut rig = Rig::new(
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r#"(module
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(func (export "f") (param v128) (result v128)
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(f32x4.mul
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(i8x16.shuffle 4 5 6 7 8 9 10 11 0 1 2 3 12 13 14 15
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(local.get 0) (local.get 0))
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(local.get 0))))"#,
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);
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let a = [2.0f32, 3.0, 5.0, 7.0];
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let out = rig.call_v("f", &[v(a)]);
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// yzxw * xyzw
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assert_eq!(out, [3.0 * 2.0, 5.0 * 3.0, 2.0 * 5.0, 7.0 * 7.0]);
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}
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/// `v = v * splat(dot(v, w))` — a scalar extracted from packed math flows
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/// through the float register while packed temporaries are live.
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#[test]
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fn scalar_register_crosses_packed_ops() {
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let mut rig = Rig::new(
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r#"(module
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(func (export "f") (param v128 v128) (result v128)
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(local $t v128)
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(local.set $t (f32x4.mul (local.get 0) (local.get 1)))
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(f32x4.mul
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(local.get 0)
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(f32x4.splat
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(f32.add
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(f32.add
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(f32x4.extract_lane 0 (local.get $t))
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(f32x4.extract_lane 1 (local.get $t)))
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(f32x4.extract_lane 2 (local.get $t)))))))"#,
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);
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let a = [1.0f32, 2.0, 3.0, 0.0];
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let b = [4.0f32, 5.0, 6.0, 0.0];
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let dot = 1.0f32 * 4.0 + 2.0 * 5.0 + 3.0 * 6.0;
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let out = rig.call_v("f", &[v(a), v(b)]);
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assert_eq!(out, [1.0 * dot, 2.0 * dot, 3.0 * dot, 0.0]);
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}
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/// Typed and untyped select over v128, with the condition both on the
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/// stack and in the integer register.
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#[test]
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fn select_v128_all_condition_kinds() {
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let mut rig = Rig::new(
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r#"(module
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(func (export "typed") (param v128 v128 i32) (result v128)
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(select (result v128) (local.get 0) (local.get 1) (local.get 2)))
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(func (export "untyped") (param v128 v128 i32) (result v128)
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(select (local.get 0) (local.get 1) (local.get 2)))
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(func (export "cond_in_reg") (param v128 v128 i32) (result v128)
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(select (result v128)
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(local.get 0)
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(local.get 1)
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(i32.add (local.get 2) (i32.const 0)))))"#,
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);
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let a = [1.0f32, 2.0, 3.0, 4.0];
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let b = [5.0f32, 6.0, 7.0, 8.0];
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for name in ["typed", "untyped", "cond_in_reg"] {
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assert_eq!(rig.call_v(name, &[v(a), v(b), Val::I32(1)]), a, "{name}, cond=1");
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assert_eq!(rig.call_v(name, &[v(a), v(b), Val::I32(0)]), b, "{name}, cond=0");
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}
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}
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/// v128 as a block/if result and live across a branch merge point.
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#[test]
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fn v128_across_branches() {
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let mut rig = Rig::new(
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r#"(module
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(func (export "if_result") (param v128 v128 i32) (result v128)
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(if (result v128) (local.get 2)
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(then (f32x4.add (local.get 0) (local.get 1)))
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(else (f32x4.sub (local.get 0) (local.get 1)))))
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(func (export "br_result") (param v128 i32) (result v128)
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(block (result v128)
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(f32x4.neg (local.get 0))
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(br_if 0 (local.get 1))
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(drop)
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(local.get 0))))"#,
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);
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let a = [1.0f32, 2.0, 3.0, 4.0];
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let b = [0.5f32, 0.25, 0.125, 8.0];
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assert_eq!(
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rig.call_v("if_result", &[v(a), v(b), Val::I32(1)]),
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[1.5, 2.25, 3.125, 12.0]
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);
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assert_eq!(
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rig.call_v("if_result", &[v(a), v(b), Val::I32(0)]),
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[0.5, 1.75, 2.875, -4.0]
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);
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assert_eq!(
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rig.call_v("br_result", &[v(a), Val::I32(1)]),
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[-1.0, -2.0, -3.0, -4.0]
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);
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assert_eq!(rig.call_v("br_result", &[v(a), Val::I32(0)]), a);
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}
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/// A v128 accumulator across a loop back-edge, with scalar loop state in
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/// the integer register.
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#[test]
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fn v128_loop_accumulator() {
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let mut rig = Rig::new(
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r#"(module
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(func (export "f") (param v128 i32) (result v128)
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(local $acc v128)
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(local $i i32)
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(local.set $acc (v128.const f32x4 0 0 0 0))
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(block
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(loop
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(br_if 1 (i32.ge_u (local.get $i) (local.get 1)))
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(local.set $acc (f32x4.add (local.get $acc) (local.get 0)))
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(local.set $i (i32.add (local.get $i) (i32.const 1)))
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(br 0)))
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(local.get $acc)))"#,
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);
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let a = [1.0f32, 2.0, 3.0, 4.0];
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assert_eq!(rig.call_v("f", &[v(a), Val::I32(5)]), [5.0, 10.0, 15.0, 20.0]);
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assert_eq!(rig.call_v("f", &[v(a), Val::I32(0)]), [0.0, 0.0, 0.0, 0.0]);
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}
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/// Many live packed temporaries at once: an 8-deep tree of adds where
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/// every leaf is a distinct shuffle of the input, forcing a tall stack of
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/// v128 temp slots.
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#[test]
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fn deep_packed_temporaries() {
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let mut rig = Rig::new(
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r#"(module
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(func (export "f") (param v128) (result v128)
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(f32x4.add
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(f32x4.add
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(f32x4.add
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(local.get 0)
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(i8x16.shuffle 4 5 6 7 0 1 2 3 12 13 14 15 8 9 10 11
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(local.get 0) (local.get 0)))
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(f32x4.add
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(i8x16.shuffle 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
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(local.get 0) (local.get 0))
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(i8x16.shuffle 12 13 14 15 8 9 10 11 4 5 6 7 0 1 2 3
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(local.get 0) (local.get 0))))
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(f32x4.add
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(f32x4.add
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(f32x4.mul (local.get 0) (local.get 0))
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(f32x4.sub (local.get 0) (local.get 0)))
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(f32x4.add
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(f32x4.neg (local.get 0))
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(f32x4.abs (local.get 0)))))))"#,
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);
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let a = [1.0f32, -2.0, 3.0, -4.0];
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// Sum of all four rotations of a is the lane-sum in every lane.
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let lane_sum = 1.0f32 + -2.0 + 3.0 + -4.0;
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let expected: Vec<f32> = (0..4)
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.map(|lane| {
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let x: f32 = a[lane];
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lane_sum + (x * x + 0.0) + (-x + x.abs())
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})
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.collect();
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assert_eq!(rig.call_v("f", &[v(a)]).to_vec(), expected);
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}
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/// Scalar and packed values interleaved: f32, i32 and v128 temporaries all
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/// live at once, in both orders, so register preservation has to happen
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/// around v128 stack traffic.
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#[test]
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fn interleaved_scalar_and_packed() {
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let mut rig = Rig::new(
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r#"(module
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(func (export "f") (param f32 v128 f32 v128 i32) (result f32)
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(f32.add
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(f32.mul
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(local.get 0)
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(f32x4.extract_lane 1 (f32x4.add (local.get 1) (local.get 3))))
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(f32.mul
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(local.get 2)
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(f32.convert_i32_s (local.get 4))))))"#,
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);
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let out = rig.call_f32(
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"f",
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&[
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Val::F32(2.0),
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v([1.0, 10.0, 3.0, 4.0]),
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Val::F32(0.5),
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v([5.0, 20.0, 7.0, 8.0]),
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Val::I32(6),
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],
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);
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assert_eq!(out, 2.0 * 30.0 + 0.5 * 6.0);
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}
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/// v128 params and results crossing a wasm-to-wasm call frame.
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#[test]
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fn v128_across_calls() {
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let mut rig = Rig::new(
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r#"(module
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(func $inner (param v128 f32) (result v128)
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(f32x4.mul (local.get 0) (f32x4.splat (local.get 1))))
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(func (export "f") (param v128) (result v128)
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(f32x4.add
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(call $inner (local.get 0) (f32.const 2.0))
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(call $inner (local.get 0) (f32.const 3.0)))))"#,
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);
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let a = [1.0f32, 2.0, 3.0, 4.0];
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assert_eq!(rig.call_v("f", &[v(a)]), [5.0, 10.0, 15.0, 20.0]);
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}
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/// local.tee with v128 while another v128 opd refers to the same local
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/// (the preserve-local path).
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#[test]
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fn v128_local_tee_preserve() {
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let mut rig = Rig::new(
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r#"(module
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(func (export "f") (param v128) (result v128)
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(local $x v128)
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(local.set $x (local.get 0))
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;; push $x as a local operand, then overwrite $x, then use both
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(f32x4.sub
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(local.get $x)
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(local.tee $x (f32x4.add (local.get $x) (local.get $x))))))"#,
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);
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let a = [1.0f32, 2.0, 3.0, 4.0];
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// old_x - (x = old_x + old_x) => -old_x
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assert_eq!(rig.call_v("f", &[v(a)]), [-1.0, -2.0, -3.0, -4.0]);
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}
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/// v128.load / v128.store against linear memory, including the unaligned
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/// and offset forms and the OOB trap boundary.
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#[test]
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fn v128_memory_roundtrip() {
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let mut rig = Rig::new(
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r#"(module
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(memory 1)
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(func (export "rt") (param i32 v128) (result v128)
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(v128.store (local.get 0) (local.get 1))
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(v128.load (local.get 0)))
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(func (export "rt_offset") (param i32 v128) (result v128)
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(v128.store offset=4 (local.get 0) (local.get 1))
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(v128.load offset=4 (local.get 0))))"#,
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);
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let a = [1.5f32, -2.5, 3.25, f32::NAN];
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for addr in [0u32, 4, 6, 65536 - 16] {
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let out = rig.call_v("rt", &[Val::I32(addr as i32), v(a)]);
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assert_eq!(out[..3], a[..3], "addr={addr}");
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assert!(out[3].is_nan());
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}
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let out = rig.call_v("rt_offset", &[Val::I32(16), v(a)]);
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assert_eq!(out[..3], a[..3]);
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// One byte past the end must trap.
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let func = rig.instance.exported_func("rt").unwrap();
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let mut results = [Val::V128(V128::ZERO)];
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assert!(func
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.call(
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&mut rig.store,
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&[Val::I32(65536 - 15), v(a)],
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&mut results
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)
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.is_err());
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}
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/// v128.const materialization interleaved with locals and shuffles.
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#[test]
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fn v128_const_and_bitselect() {
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let mut rig = Rig::new(
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r#"(module
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(func (export "f") (param v128) (result v128)
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(v128.bitselect
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(local.get 0)
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(v128.const f32x4 9 9 9 9)
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(v128.const i32x4 0xFFFFFFFF 0 0xFFFFFFFF 0))))"#,
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);
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let a = [1.0f32, 2.0, 3.0, 4.0];
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assert_eq!(rig.call_v("f", &[v(a)]), [1.0, 9.0, 3.0, 9.0]);
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}
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